In general, an image sensor is a semiconductor device for converting an optical image into an electrical signal. Image sensors are generally classified into charge coupled devices (CCDs) or complementary metal oxide silicon (CMOS) image sensors (CISs).
A CMOS image sensor includes a photodiode and a MOS transistor formed in a unit pixel, and can display an image by sequentially detecting an electrical signal in each unit pixel using a switching method.
The CMOS image sensors are classified into 3T type, 4T type, 5T type and the like according to the number of transistors in a unit pixel. The 3T type CMOS image sensor includes one photodiode and three transistors, and the 4T type CMOS image sensor includes one photodiode and four transistors.
FIG. 1 is a layout of a unit pixel of a 4T type CMOS image sensor according to the related art, and FIG. 2 is a sectional view taken along the line II-II′ of FIG. 1.
Referring to FIGS. 1 and 2, in a 4T type CMOS image sensor according to the related art, a P-well region 32 is formed in a semiconductor substrate 31 in which an active region and a device isolation region are defined. A device isolation layer 34 is formed on the device isolation region of the semiconductor substrate 31.
Gate electrodes 23, 33, 43, and 53 of four transistors are formed on the active region of the semiconductor substrate 31 isolated by the device isolation layer 34.
The gate electrodes 23, 33, 43, and 53 of the four transistors include the transfer transistor gate electrode 23, the reset transistor gate electrode 33, the drive transistor gate electrode 43 and the select transistor gate electrode 53.
A photodiode ‘PD’ 60 is formed at one side of the gate electrode 23 of the transfer transistor.
Herein, a n+ diffusion region 36, i.e., source/drain region, is formed in the active region of each transistor by implanting to the same depth n+ impurity ions at high concentration into the active region of each transistor except in the photodiode ‘PD’ 60 and a portion below each of the transistors 23, 33, 43, and 53.
The gate electrode 33 of FIG. 2 is the gate electrode 33 of the reset transistor, and the n+ diffusion region 36 between the gate electrode 23 of the transfer transistor and the gate electrode 33 of the reset transistor is a floating diffusion region ‘FD’.
Non-described bold solid line ‘L’ indicates a connection line connecting the floating diffusion region ‘FD’ and the drive transistor gate electrode 43.
In the related art CMOS image sensor, the n+ diffusion region 36 for each transistor is formed in the entire active region (i.e., uniform dashed line portion) except for the photodiode ‘PD’ region by the same ion implantation process in all peripheral circuits (remaining device region except for the pixel array).
In the related art CMOS image sensor, since the n+ diffusion regions 36 have the same ion implantation concentration, they have the same leakage current and the same junction capacitance per unit area.
Accordingly, in the CMOS image sensor having four transistors and one photodiode, it is very important to reduce the junction leakage in the floating diffusion region. This is because the potential of the floating diffusion region serves as a direct input potential of the drive transistor.
However, according to the related art, since the junction leakage of the floating diffusion region has the same value per unit area in input node ‘Vin’, output node ‘Vout’, and the peripheral circuit, the floating diffusion region fails to perform its true function.
In other words, the true function of the floating diffusion region is to preserve a small amount of electrons diffused from the photodiode without any change. However, if such electrons are lost due to leakage, the floating diffusion region fails to perform its true function, so that the characteristics of the CMOS image sensor are deteriorated.
In the case of the related art CMOS image sensors; the 3T CMOS image sensor has a similar problem to the 4T CMOS image sensor.
That is, in the 3T type CMOS image sensor, the potential of a region between the photodiode region and the gate electrode of the reset transistor serves as a direct input potential of the drive transistor, and the junction leakage between the photodiode region and the gate electrode of the reset transistor has the same value per unit area in the input node ‘Vin’, the output node ‘Vout’, and the peripheral circuit. Accordingly, leakage loss occurs.